Invention Grant
- Patent Title: DAC capacitor array, SAR analog-to-digital converter and method for reducing power consumption thereof
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Application No.: US15827179Application Date: 2017-11-30
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Publication No.: US10270459B2Publication Date: 2019-04-23
- Inventor: Shuo Fan
- Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
- Applicant Address: CN Shenzhen
- Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
- Current Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
- Current Assignee Address: CN Shenzhen
- Agency: Heslin Rothenberg Farley & Mesiti P.C.
- Priority: WOPCT/CN2016/099835 20160923
- Main IPC: H03M1/00
- IPC: H03M1/00 ; H03M1/46

Abstract:
The present disclosure relates to a method for reducing power consumption, including: connecting one terminal of each capacitor in a first and a second capacitor array of an SAR ADC to a first reference voltage via a corresponding primary switch, connecting the other terminal of the capacitors to a positive-terminal analog input signal and a negative-terminal analog input signal respectively via a corresponding multiplexer to complete sampling; determining a value of a most-significant bit by comparing an output voltage of the first capacitor array with an output voltage of the second capacitor array, maintaining or adjusting a reference voltage connected to the other terminal of each capacitor according to the value of the most-significant bit, and determining values of a second-most-significant bit and a least-significant bit by comparing the output voltage of the first capacitor array with the output voltage of the second capacitor array.
Public/Granted literature
- US20180091163A1 DAC CAPACITOR ARRAY, SAR ANALOG-TO-DIGITAL CONVERTER AND METHOD FOR REDUCING POWER CONSUMPTION THEREOF Public/Granted day:2018-03-29
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