- 专利标题: Method of integrating capacitors on lead frame in semiconductor devices
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申请号: US15282619申请日: 2016-09-30
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公开(公告)号: US10283441B2公开(公告)日: 2019-05-07
- 发明人: Fulvio Vittorio Fontana , Giovanni Graziosi
- 申请人: STMICROELECTRONICS S.R.L.
- 申请人地址: IT Agrate Brianza
- 专利权人: STMICROELECTRONICS S.R.L.
- 当前专利权人: STMICROELECTRONICS S.R.L.
- 当前专利权人地址: IT Agrate Brianza
- 代理机构: Seed IP Law Group LLP
- 优先权: IT102016000020111 20160226
- 主分类号: H01L23/495
- IPC分类号: H01L23/495 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L49/02
摘要:
In an embodiment, a method of integrating capacitors in semiconductor devices includes: providing a lead-frame for a semiconductor device, the lead-frame including one or more electrically conductive areas, forming a dielectric layer over the electrically conductive area or areas, forming an electrically conductive layer over the dielectric layer thus forming one or more capacitors including the dielectric layer sandwiched between an electrically conductive area and the electrically conductive layer, and arranging a semiconductor die onto the lead-frame by providing electrical contact between the semiconductor die and the electrically conductive layer.
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