Invention Grant
- Patent Title: Duty cycle correction scheme for complementary signals
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Application No.: US15639153Application Date: 2017-06-30
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Publication No.: US10284182B2Publication Date: 2019-05-07
- Inventor: Primit Modi , Venkatesh Ramachandra , Tianyu Tang , Srinivas Rajendra
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Plano
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Plano
- Agency: Brinks, Gilson & Lione
- Main IPC: H03K3/017
- IPC: H03K3/017 ; H03K5/156 ; H03K5/151 ; H03K7/08 ; G11C7/22 ; G11C29/02 ; G11C7/04 ; G11C7/10

Abstract:
A complementary signal path may include an amplifier circuit configured to receive a pair of complementary input signals and a data alignment circuit configured to output a pair of complementary output signals in response to the pair of complementary input signals. A control circuit may detect duty cycle distortion in the pair of complementary output signals and perform a duty cycle correction process to remove the distortion. To do so, the control circuit may search for target current amounts in response to the duty cycle distortion and inject a control current into the amplifier circuit at the target current amounts.
Public/Granted literature
- US20180175834A1 DUTY CYCLE CORRECTION SCHEME FOR COMPLEMENTARY SIGNALS Public/Granted day:2018-06-21
Information query
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