Invention Grant
- Patent Title: Erase and soft program for vertical NAND flash
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Application No.: US15050871Application Date: 2016-02-23
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Publication No.: US10290356B2Publication Date: 2019-05-14
- Inventor: Krishna K. Parat , Pranav Kalavade , Koichi Kawai , Akira Goda
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/16 ; G11C8/12 ; G11C16/34

Abstract:
Methods, and apparatuses to erase and or soft program a block of NAND memory may include performing an erase cycle on a block of NAND memory comprising two or more sub-blocks, verifying the two or more sub-blocks until a sub-block fails to verify, stopping the verification in response to the failed verify, performing another erase cycle on the block of NAND memory, and re-starting to verify the two or more sub-blocks at the sub-block that failed to verify.
Public/Granted literature
- US20160336073A1 ERASE AND SOFT PROGRAM FOR VERTICAL NAND FLASH Public/Granted day:2016-11-17
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