Invention Grant
- Patent Title: Method of manufacturing a semiconductor device with metal gate etch selectivity control
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Application No.: US15823134Application Date: 2017-11-27
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Publication No.: US10290547B2Publication Date: 2019-05-14
- Inventor: Chia-Ching Tsai , Yi-Wei Chiu , Li-Te Hsu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/66 ; H01L29/49 ; H01L21/3213 ; H01L21/321 ; H01L21/311 ; H01L29/78 ; H01L27/088
Abstract:
A method of manufacturing a semiconductor device includes forming a first layer of a conductive material in gate spaces created by removing portions of a dummy gate structure. The first layer further includes a top layer on an entire structure formed on a fin structure, and a gate space for a short channel gate and a gate space for a long channel gate. A first portion of the top layer is removed to leave a hard mask layer over a long channel gate region. The hard mask layer and a portion of heights of the conductive material in the gate spaces are removed to form a first structure. A second layer of the conductive material is formed over the first structure. Portions of the second layer are removed to create a recessed conductive portion for the short channel gate and a recessed conductive portion for the long channel gate.
Public/Granted literature
- US20180174915A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH METAL GATE ETCH SELECTIVITY CONTROL Public/Granted day:2018-06-21
Information query
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