Invention Grant
- Patent Title: Buried interconnect conductor
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Application No.: US15698030Application Date: 2017-09-07
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Publication No.: US10290635B2Publication Date: 2019-05-14
- Inventor: Kuo-Cheng Ching , Shi Ning Ju , Kuan-Ting Pan , Kuan-Lun Cheng , Chih-Hao Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/78 ; H01L29/06 ; H01L23/528 ; H01L21/8234 ; H01L21/308 ; H01L21/762 ; H01L29/66 ; H01L21/3065 ; H01L21/768

Abstract:
Various examples of a buried interconnect line are disclosed herein. In an example, a device includes a fin disposed on a substrate. The fin includes an active device. A plurality of isolation features are disposed on the substrate and below the active device. An interconnect is disposed on the substrate and between the plurality of isolation features such that the interconnect is below a topmost surface of the plurality of isolation features. The interconnect is electrically coupled to the active device. In some such examples, a gate stack of the active device is disposed over a channel region of the active device and is electrically coupled to the interconnect. In some such examples, a source/drain contact is electrically coupled to a source/drain region of the active device, and the source/drain contact is electrically coupled to the interconnect.
Public/Granted literature
- US20190035785A1 Buried Interconnect Conductor Public/Granted day:2019-01-31
Information query
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