Invention Grant
- Patent Title: Method for forming trench capacitor having two dielectric layers and two polysilicon layers
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Application No.: US15245511Application Date: 2016-08-24
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Publication No.: US10290699B2Publication Date: 2019-05-14
- Inventor: Hideaki Kawahara , Binghua Hu , Sameer Pendharkar
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L49/02
- IPC: H01L49/02 ; H01L21/283 ; H01L21/311 ; H01L21/768 ; H01L23/535

Abstract:
An integrated trench capacitor and method for making the trench capacitor is disclosed. The method includes forming a trench in a silicon layer, forming a first dielectric on the exposed surface of the trench, performing an anisotropic etch of the first dielectric to expose silicon at the bottom of the trench, implanting a dopant into exposed silicon at the bottom of the trench, forming a first polysilicon layer over the first dielectric, forming a second dielectric over the first polysilicon layer, and forming a second polysilicon layer over the second dielectric to fill the trench.
Public/Granted literature
- US20180061932A1 Method for Forming Trench Isolated Capacitor and Substrate Contact Public/Granted day:2018-03-01
Information query
IPC分类: