Invention Grant
- Patent Title: Cascode structure for linear regulators and clamps
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Application No.: US15142219Application Date: 2016-04-29
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Publication No.: US10291163B2Publication Date: 2019-05-14
- Inventor: Alejandro Vera , Shyamsunder Balasubramanian , Toshio Yamanaka , Toru Tanaka
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: H02P8/12
- IPC: H02P8/12 ; G05F1/595

Abstract:
A voltage regulator includes an output transistor, an error amplifier coupled to the output transistor, a cascode transistor coupled to the output transistor in series, and a cascode bias circuit coupled to the cascode transistor and the output transistor. The output transistor is configured to generate an output signal at a first voltage. The error amplifier is configured to receive a reference signal. The cascode bias circuit is configured to bias the cascode transistor such that, in response to a drain-to-source short circuit of the output transistor, the cascode transistor generates the output signal at the first voltage.
Public/Granted literature
- US20170317625A1 CASCODE STRUCTURE FOR LINEAR REGULATORS AND CLAMPS Public/Granted day:2017-11-02
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