Invention Grant
- Patent Title: Error correcting code for correcting single symbol errors and detecting double bit errors
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Application No.: US15605310Application Date: 2017-05-25
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Publication No.: US10291258B2Publication Date: 2019-05-14
- Inventor: Chin-Long Chen
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Meyertons Hood Kivlin Kowert and Goetzel PC
- Agent Rory D. Rankin
- Main IPC: H03M13/11
- IPC: H03M13/11 ; H03M13/00 ; H03M13/15 ; H03M13/07 ; H03M13/03 ; H03M13/13 ; H03M13/19

Abstract:
Systems, apparatuses, and methods for generating error correction codes (ECCs) with two check symbols are disclosed. In one embodiment, a system receives a data word of length N−2 symbols, wherein N is a positive integer greater than 2, wherein each symbol has m bits, and wherein m is positive integer. The system generates a code word of length N symbols from the data word in accordance with a linear code defined by a parity check matrix. The parity check matrix is generated based on powers of γ, wherein γ is equal to β raised to the (2m/4−1) power, β is equal to a raised to the (2m/2+1) power, and α is a primitive element of GF(2m). In another embodiment, the system receives a (N, N−2) code word and decodes the code word by generating a syndrome S from the code word using the parity check matrix.
Public/Granted literature
- US20180343018A1 ERROR CORRECTING CODE FOR CORRECTING SINGLE SYMBOL ERRORS AND DETECTING DOUBLE BIT ERRORS Public/Granted day:2018-11-29
Information query
IPC分类: