Invention Grant
- Patent Title: Low noise reference voltage generator and load regulator
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Application No.: US14918651Application Date: 2015-10-21
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Publication No.: US10296026B2Publication Date: 2019-05-21
- Inventor: Aaron J. Caffee , Vaibhav Karkare
- Applicant: Silicon Laboratories Inc.
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Zagorin Cave LLP
- Main IPC: H03K5/003
- IPC: H03K5/003 ; G05F1/567 ; G05F3/20 ; G05F3/30 ; H01L35/00 ; G05F1/46 ; G05F1/575

Abstract:
A low-noise voltage reference generator that utilizes internal gain and feedback to generate an output signal having reduced sensitivity to power supply variations and loading conditions is described. A method includes generating a current based on a voltage drop across a resistor. The voltage drop is based on a second voltage drop across a gate terminal of a transistor and a source terminal of the transistor. The method includes the current using a reference voltage to generate a mirrored current through a node coupled to the drain terminal of the transistor. The method includes generating a level-shifted voltage using a voltage on the node. The method includes buffering the level-shifted voltage using a power supply voltage to generate the reference voltage.
Public/Granted literature
- US20170115677A1 LOW NOISE REFERENCE VOLTAGE GENERATOR AND LOAD REGULATOR Public/Granted day:2017-04-27
Information query
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