Invention Grant
- Patent Title: Method of manufacturing redistribution circuit structure and method of manufacturing integrated fan-out package
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Application No.: US15235109Application Date: 2016-08-12
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Publication No.: US10297551B2Publication Date: 2019-05-21
- Inventor: Hui-Jung Tsai , Hung-Jui Kuo , Yun-Chen Hsieh
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L25/10 ; H01L23/498 ; H01L23/00 ; H01L25/00

Abstract:
A method of manufacturing a redistribution circuit structure and a method of manufacturing an INFO package at least include the following steps. An inter-dielectric layer is formed over a substrate. A seed layer is formed over the inter-dielectric layer. A plurality of conductive patterns are formed over the seed layer. The seed layer and the conductive patterns include a same material. While maintain a substantially uniform pitch width in the conductive pattern, the seed layer exposed by the conductive patterns is selectively removed through a dry etch process to form a plurality of seed layer patterns. The conductive patterns and the seed layer patterns form a plurality of redistribution conductive patterns.
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