Invention Grant
- Patent Title: Load lock interface and integrated post-processing module
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Application No.: US14887959Application Date: 2015-10-20
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Publication No.: US10304707B2Publication Date: 2019-05-28
- Inventor: David Trussell , Richard Gould , John Daugherty
- Applicant: Lam Research Corporation
- Applicant Address: US CA Fremont
- Assignee: LAM RESEARCH CORPORATION
- Current Assignee: LAM RESEARCH CORPORATION
- Current Assignee Address: US CA Fremont
- Main IPC: H01L21/67
- IPC: H01L21/67 ; H01L21/673 ; H01L21/677

Abstract:
A load lock assembly includes a first load lock connected between an equipment front end module (EFEM) and a wafer transport module, the EFEM being at a lab ambient condition, the wafer transport module being at a vacuum condition, the wafer transport module being part of a wafer transport assembly that is configured to transport wafers to and from one or more process modules that are connected to the wafer transport assembly; a second load lock disposed over the first load lock, the second load lock connected between the EFEM and the wafer transport module; a post-processing module disposed over the second load lock, the post-processing module configured for performing a post-processing operation on a processed wafer that has been processed in at least one of the process modules that are connected to the wafer transport assembly, the post-processing module being configured for connection to the wafer transport module.
Public/Granted literature
- US20170110351A1 LOAD LOCK INTERFACE AND INTEGRATED POST-PROCESSING MODULE Public/Granted day:2017-04-20
Information query
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