Invention Grant
- Patent Title: Semiconductor package having a circuit pattern
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Application No.: US15880917Application Date: 2018-01-26
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Publication No.: US10304766B2Publication Date: 2019-05-28
- Inventor: Bu-won Kim , Dae-ho Lee , Hee-jin Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2017-0102568 20170811
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/498 ; H01L25/18 ; H01L21/48 ; H01L23/538 ; H01L25/065 ; H01L23/00

Abstract:
A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first installation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.
Public/Granted literature
- US20190051592A1 SEMICONDUCTOR PACKAGE HAVING A CIRCUIT PATTERN Public/Granted day:2019-02-14
Information query
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