公开(公告)号：US10141293B2

公开(公告)日：2018-11-27

申请号：US15857882

申请日：2017-12-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok-hong Kwon ,  Sang-nam Jeong ,  Sun-won Kang ,  Hee-jin Lee

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package includes a package base substrate including bonding pads and a connection pads respectively on an upper surface and a lower surface of the package base substrate, four semiconductor chips attached onto the package base substrate, including a 1A semiconductor chip, a 1B semiconductor chip, a 2A semiconductor chip, and a 2B semiconductor chip, and each including a plurality of chip pads that are adjacent to a first edge of an upper surface of each of the 1A semiconductor chip, the 1B semiconductor chip, the 2A semiconductor chip, and the 2B semiconductor chip, and a bonding wire electrically connecting the chip pad and the bonding pad to each other, wherein the four semiconductor chips are disposed on the package base substrate such that first edges of the four semiconductor chips respectively face edges of the package base substrate that are different from each other.

公开(公告)号：US09859263B2

公开(公告)日：2018-01-02

申请号：US15239020

申请日：2016-08-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok-hong Kwon ,  Sang-nam Jeong ,  Sun-won Kang ,  Hee-jin Lee

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/18 ,  H01L23/3128 ,  H01L23/49838 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/1434 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A semiconductor package includes a package base substrate including bonding pads and a connection pads respectively on an upper surface and a lower surface of the package base substrate, four semiconductor chips attached onto the package base substrate, including a 1A semiconductor chip, a 1B semiconductor chip, a 2A semiconductor chip, and a 2B semiconductor chip, and each including a plurality of chip pads that are adjacent to a first edge of an upper surface of each of the 1A semiconductor chip, the 1B semiconductor chip, the 2A semiconductor chip, and the 2B semiconductor chip, and a bonding wire electrically connecting the chip pad and the bonding pad to each other, wherein the four semiconductor chips are disposed on the package base substrate such that first edges of the four semiconductor chips respectively face edges of the package base substrate that are different from each other.

公开(公告)号：US10714416B2

公开(公告)日：2020-07-14

申请号：US16362936

申请日：2019-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bu-won Kim ,  Dae-ho Lee ,  Hee-jin Lee

IPC: H01L23/52 ,  H01L23/498 ,  H01L25/18 ,  H01L21/48 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first insulation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.

公开(公告)号：US10304766B2

公开(公告)日：2019-05-28

申请号：US15880917

申请日：2018-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bu-won Kim ,  Dae-ho Lee ,  Hee-jin Lee

IPC: H01L23/52 ,  H01L23/498 ,  H01L25/18 ,  H01L21/48 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first installation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.

公开(公告)号：US20190051592A1

公开(公告)日：2019-02-14

申请号：US15880917

申请日：2018-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： BU-WON KIM ,  Dae-ho Lee ,  Hee-jin Lee

IPC: H01L23/498 ,  H01L25/18 ,  H01L21/48 ,  H01L23/538 ,  H01L25/065

Abstract: A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first installation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.

公开(公告)号：US20190221512A1

公开(公告)日：2019-07-18

申请号：US16362936

申请日：2019-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bu-Won Kim ,  Dae-ho Lee ,  Hee-jin Lee

IPC: H01L23/498 ,  H01L23/538 ,  H01L25/18 ,  H01L21/48 ,  H01L25/065

Abstract: A semiconductor package includes a circuit pattern extending in a horizontal direction. The circuit pattern is conductive. A first insulation layer is disposed on the circuit pattern. A semiconductor chip is disposed on the first insulation layer. The first insulation layer includes first protrusions which protrude from a bottom surface of the first insulation layer, penetrate through at least a portion of the circuit pattern, and have a mesh structure. A second protrusion protrudes from the bottom surface of the first insulation layer and penetrates at least a portion of the circuit pattern. The second protrusion is spaced apart from the semiconductor chip in the horizontal direction. The second protrusion has a width in the horizontal direction wider than that of each of the first protrusions.