Invention Grant
- Patent Title: Two-dimensional condensation for uniaxially strained semiconductor fins
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Application No.: US15650569Application Date: 2017-07-14
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Publication No.: US10304929B2Publication Date: 2019-05-28
- Inventor: Jack T. Kavalieros , Nancy Zelick , Been-Yih Jin , Markus Kuhn , Stephen M. Cea
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/66 ; H01L29/78 ; H01L29/165 ; H01L29/161

Abstract:
Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.
Public/Granted literature
- US20170317172A1 TWO-DIMENSIONAL CONDENSATION FOR UNIAXIALLY STRAINED SEMICONDUCTOR FINS Public/Granted day:2017-11-02
Information query
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