An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a host interface circuit connectable to a host. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory, compute a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from the host, compute a second bandwidth of the memory that is available to the host through the host interface circuit based on the first bandwidth consumed by the controller, receive a hypothetical consumption of additional bandwidth by the host, update the second bandwidth based on the hypothetical consumption, and report the second bandwidth as updated to the host through the host interface circuit.