公开(公告)号：US10346058B2

公开(公告)日：2019-07-09

申请号：US16186958

申请日：2018-11-12

Applicant: Seagate Technology LLC

Inventor： Timothy L. Canepa ,  Ramdas P. Kachare

IPC: G06F3/06 ,  G06F13/16 ,  G06F12/02

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a host interface circuit connectable to a host. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory, compute a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from the host, compute a second bandwidth of the memory that is available to the host through the host interface circuit based on the first bandwidth consumed by the controller, receive a hypothetical consumption of additional bandwidth by the host, update the second bandwidth based on the hypothetical consumption, and report the second bandwidth as updated to the host through the host interface circuit.

公开(公告)号：US20190079680A1

公开(公告)日：2019-03-14

申请号：US16186958

申请日：2018-11-12

Applicant: Seagate Technology LLC

Inventor： Timothy L. Canepa ,  Ramdas P. Kachare

IPC: G06F3/06 ,  G06F12/02 ,  G06F13/16

CPC classification number: G06F3/0613 ,  G06F3/0611 ,  G06F3/0619 ,  G06F3/0625 ,  G06F3/065 ,  G06F3/0652 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F13/1668

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a host interface circuit connectable to a host. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory, compute a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from the host, compute a second bandwidth of the memory that is available to the host through the host interface circuit based on the first bandwidth consumed by the controller, receive a hypothetical consumption of additional bandwidth by the host, update the second bandwidth based on the hypothetical consumption, and report the second bandwidth as updated to the host through the host interface circuit.

公开(公告)号：US10156999B2

公开(公告)日：2018-12-18

申请号：US15082492

申请日：2016-03-28

Applicant: Seagate Technology LLC

Inventor： Timothy L. Canepa ,  Ramdas P. Kachare

IPC: G06F3/06 ,  G06F12/02 ,  G06F13/16

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a plurality of tables. The controller is generally configured to process a plurality of input/output requests to read/write to/from the memory, track a plurality of statistics of the memory, index the plurality of tables with the plurality of statistics of the memory to determine a plurality of parameters, compute based on the plurality of parameters a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from a host, and report to the host a second bandwidth of the memory that is available to the host based on the first bandwidth consumed by the controller.

公开(公告)号：US20170277444A1

公开(公告)日：2017-09-28

申请号：US15082492

申请日：2016-03-28

Applicant: Seagate Technology LLC

Inventor： Timothy L. Canepa ,  Ramdas P. Kachare

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0611 ,  G06F3/0619 ,  G06F3/0625 ,  G06F3/065 ,  G06F3/0652 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F13/1668

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a plurality of tables. The controller is generally configured to process a plurality of input/output requests to read/write to/from the memory, track a plurality of statistics of the memory, index the plurality of tables with the plurality of statistics of the memory to determine a plurality of parameters, compute based on the plurality of parameters a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from a host, and report to the host a second bandwidth of the memory that is available to the host based on the first bandwidth consumed by the controller.