A device includes a first chip having a front side and a back side. A second chip is stacked with the first chip and located on the back side of the first chip. A first loop includes first and second through vias located in the first chip. Each through via has a first end on the front side of the first chip and a second end on the back side of the first chip. The first loop also includes a first track that connects the first ends of the first and second through vias is located in the first chip on the front side thereof and a second track that connects the second ends of the first and second through vias is located in the second chip. A detection circuit can detect an electrical characteristic of the first loop.