Invention Grant
- Patent Title: Three-dimensional semiconductor memory devices including first contact having a stepwise profile at interface between two portions
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Application No.: US15842029Application Date: 2017-12-14
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Publication No.: US10354740B2Publication Date: 2019-07-16
- Inventor: Kwang-Ho Kim , Jihwan Yu , Seunghyun Cho
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2017-0053108 20170425
- Main IPC: G11C19/28
- IPC: G11C19/28 ; H01L27/11578 ; G11C8/14 ; G11C11/412 ; H01L27/11565 ; H01L27/1157 ; H01L27/11573 ; H01L27/11575 ; H01L27/11582 ; G11C5/02

Abstract:
Disclosed is a three-dimensional semiconductor device including a stack structure on a substrate and including electrodes that are vertically stacked on top of each other on a first region of a substrate, a vertical structure penetrating the stack structure and including a first semiconductor pattern, a data storage layer between the first semiconductor pattern and at least one of the electrodes, a transistor on a second region of the substrate, and a first contact coupled to the transistor. The first contact includes a first portion and a second portion on the first portion. Each of the first portion and the second portions has a diameter that increases with an increasing vertical distance from the substrate. A diameter of an upper part of the first portion is greater than a diameter of a lower part of the second portion.
Public/Granted literature
- US20180308559A1 THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES Public/Granted day:2018-10-25
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