Invention Grant
- Patent Title: Method for forming flash memory structure
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Application No.: US15855940Application Date: 2017-12-27
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Publication No.: US10355011B2Publication Date: 2019-07-16
- Inventor: Fu-Ting Sung , Chung-Chiang Min , Wei-Hang Huang , Shih-Chang Liu , Chia-Shiung Tsai
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/34 ; H01L29/49 ; H01L29/66 ; H01L29/78 ; H01L21/768 ; H01L23/528 ; H01L29/423 ; H01L29/788 ; H01L27/11521 ; H01L27/11568

Abstract:
Methods for forming semiconductor structures are provided. The method for forming the semiconductor structure includes forming a control gate over a substrate and forming a dielectric layer covering the control gate. The method further includes forming a conductive layer having a first portion and a second portion over the dielectric layer. In addition, the first portion of the conductive layer is separated from the control gate by the dielectric layer. The method further includes forming an oxide layer on a top surface of the first portion of the conductive layer and removing the second portion of the conductive layer to form a memory gate.
Public/Granted literature
- US20180122820A1 METHOD FOR FORMING FLASH MEMORY STRUCTURE Public/Granted day:2018-05-03
Information query
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