Apparatus including a memory array further include an analog voltage generation circuit, an analog controller, a data cache, a data cache controller, and a master controller. The master controller is configured to generate an indication in response to an interpreted command. The analog controller is configured to determine, in response to the indication, what analog voltages should be generated by the analog voltage generation circuit for the apparatus to perform the interpreted command. The data cache controller is configured to determine, in response to the indication, whether the data cache should be configured to accept data from the memory array or to provide data to the memory array for the apparatus to perform the interpreted command.