Invention Grant
- Patent Title: Nanosheet devices with CMOS epitaxy and method of forming
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Application No.: US16133850Application Date: 2018-09-18
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Publication No.: US10366931B2Publication Date: 2019-07-30
- Inventor: Ruilong Xie , Cheng Chi , Pietro Montanini , Tenko Yamashita , Nicolas Loubet
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent Anthony Canale
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L21/8238 ; H01L27/092

Abstract:
This disclosure relates to a method of forming nanosheet devices including: forming a first and second nanosheet stack on a substrate, the first and the second nanosheet stacks including a plurality of vertically spaced nanosheets disposed on the substrate and separated by a plurality of spacing members, each of the plurality of spacing members including a sacrificial layer and a pair of inner spacers formed on lateral ends of the sacrificial layer; growing a pair of epitaxial regions adjacent to the first and second nanosheet stacks from each of the plurality of nanosheets such that each of the plurality of inner spacers is enveloped by one of the epitaxial regions; covering the first nanosheet stack with a mask; and forming a pair of p-type source/drain regions on the second nanosheet stack, each of the pair of p-type source/drain regions being adjacent to the epitaxial regions on the second nanosheet stack.
Public/Granted literature
- US20190019733A1 NANOSHEET DEVICES WITH CMOS EPITAXY AND METHOD OF FORMING Public/Granted day:2019-01-17
Information query
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