Invention Grant
- Patent Title: Flat no-lead packages with electroplated edges
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Application No.: US15438533Application Date: 2017-02-21
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Publication No.: US10366947B2Publication Date: 2019-07-30
- Inventor: Reynaldo Corpuz Javier , Alok Kumar Lohia , Andy Quang Tran
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/495 ; H01L23/00 ; H01L21/48 ; H01L23/29 ; H01L23/367 ; H01L21/56 ; H01L23/31
Abstract:
A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.
Public/Granted literature
- US20170162489A1 Flat No-Lead Packages with Electroplated Edges Public/Granted day:2017-06-08
Information query
IPC分类:
