Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US15513545Application Date: 2015-03-30
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Publication No.: US10374053B2Publication Date: 2019-08-06
- Inventor: Yoshitake Kato
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- International Application: PCT/JP2015/059956 WO 20150330
- International Announcement: WO2016/157371 WO 20161006
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L21/28 ; H01L29/20 ; H01L29/40 ; H01L29/423 ; H01L29/49 ; H01L29/66 ; H01L29/778

Abstract:
The characteristics of a semiconductor device are enhanced. In a semiconductor device (MISFET) having a gate electrode GE formed on a nitride semiconductor layer CH via a gate insulating film GI, the gate insulating film GI is configured to have a first gate insulating film (oxide film of a first metal) GIa formed on the nitride semiconductor layer CH and a second gate insulating film (oxide film of a second metal) GIb. And, the second metal (e.g., Hf) has lower electronegativity than the first metal (e.g., Al). By thus making the electronegativity of the second metal lower than the electronegativity of the first metal, a threshold voltage (Vth) can be shifted in a positive direction. Moreover, the gate electrode GE is configured to have a first gate electrode (nitride film of a third metal) GEa formed on the second gate insulating film GIb and a second gate electrode (fourth metal) GEb. This prevents the diffusion of oxygen to the gate insulating film GI, and variations in the threshold voltage (Vth) can be reduced.
Public/Granted literature
- US20170317183A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-11-02
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