An optoelectronic chip includes a semiconductor layer sequence including at least one n-doped semiconductor layer, at least one p-doped semiconductor layer, an active layer arranged between the at least one n-doped semiconductor layer and the at least one p-doped semiconductor layer, wherein the p-doped semiconductor layer is electrically contacted by a p-connection contact, the n-doped semiconductor layer is electrically contacted by an n-connection contact, the semiconductor chip has at least two trenches, the p-connection contact is located within the first trench and the n-connection contact is located within the second trench, below the p-connection contact and within the first trench a first dielectric mirror element is arranged, which is electrically insulated, and below the n-connection contact and within the second trench and between the n-connection contact and the n-doped semiconductor layer, a second dielectric mirror element is arranged at least in regions, the second dielectric mirror element being electrically insulated.