Invention Grant
- Patent Title: Pattern placement error aware optimization
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Application No.: US15126234Application Date: 2015-03-03
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Publication No.: US10386727B2Publication Date: 2019-08-20
- Inventor: Duan-Fu Stephen Hsu , Jianjun Jia , Xiaofeng Liu , Cuiping Zhang
- Applicant: ASML Netherlands B.V.
- Applicant Address: NL Veldhoven
- Assignee: ASML Netherlands B.V.
- Current Assignee: ASML Netherlands B.V.
- Current Assignee Address: NL Veldhoven
- Agency: Pillsbury Winthrop Shaw Pittman LLP
- International Application: PCT/EP2015/054448 WO 20150303
- International Announcement: WO2015/139951 WO 20150924
- Main IPC: G03F7/20
- IPC: G03F7/20 ; G03F1/36
Abstract:
A method to improve a lithographic process for imaging a portion of a design layout onto a substrate using a lithographic projection apparatus, the method including: computing a multi-variable cost function of a plurality of design variables that are characteristics of the lithographic process, and reconfiguring the characteristics of the lithographic process by adjusting the design variables until a predefined termination condition is satisfied. The multi-variable cost function may be a function of one or more pattern shift errors. Reconfiguration of the characteristics may be under one or more constraints on the one or more pattern shift errors.
Public/Granted literature
- US20170082927A1 PATTERN PLACEMENT ERROR AWARE OPTIMIZATION Public/Granted day:2017-03-23
Information query
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