Invention Grant
- Patent Title: Protected electronic chip
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Application No.: US16161785Application Date: 2018-10-16
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Publication No.: US10388724B2Publication Date: 2019-08-20
- Inventor: Clement Champeix , Nicolas Borrel , Alexandre Sarafianos
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee Address: FR Rousset
- Agency: Slater Matsil, LLP
- Priority: FR1659451 20160930
- Main IPC: G06F21/78
- IPC: G06F21/78 ; H01L29/06 ; G06F21/88 ; G06F21/77 ; H01L27/06 ; H01L29/10 ; H03K5/24 ; G06F21/75 ; G06F21/87 ; H01L23/00 ; H01L27/092 ; H01L29/66 ; H01L21/8238

Abstract:
An electronic chip includes a doped semiconductor substrate of a first conductivity type, a doped buried layer of a second conductivity type overlying the substrate, and a first doped well of the first conductivity type overlying the buried layer. Circuit components can be formed at a top surface of the first doped well and separated from the buried layer. A current detector is coupled to the buried layer and configured detect a bias current flowing into or out of the buried layer.
Public/Granted literature
- US20190051723A1 Protected Electronic Chip Public/Granted day:2019-02-14
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