Invention Grant
- Patent Title: High-electron-mobility transistors with counter-doped dopant diffusion barrier
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Application No.: US15755448Application Date: 2015-09-25
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Publication No.: US10388764B2Publication Date: 2019-08-20
- Inventor: Chandra S. Mohapatra , Harold W. Kennel , Matthew V. Metz , Gilbert Dewey , Willy Rachmady , Anand S. Murthy , Jack T. Kavalieros , Tahir Ghani
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard, & Mughal LLP
- International Application: PCT/US2015/052299 WO 20150925
- International Announcement: WO2017/052608 WO 20170330
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/02 ; H01L27/092 ; H01L29/778 ; H01L29/78

Abstract:
III-V compound semiconductor devices, such transistors, may be formed in active regions of a III-V semiconductor material disposed over a silicon substrate. A counter-doped portion of a III-V semiconductor material provides a diffusion barrier retarding diffusion of silicon from the substrate into III-V semiconductor material where it might otherwise behave as electrically active amphoteric contaminate in the III-V material. In some embodiments, counter-dopants (e.g., acceptor impurities) are introduced in-situ during epitaxial growth of a base portion of a sub-fin structure. With the counter-doped region limited to a base of the sub-fin structure, risk of the counter-dopant atoms thermally diffusing into an active region of a III-V transistor is mitigated.
Public/Granted literature
- US20180254332A1 HIGH-ELECTRON-MOBILITY TRANSISTORS WITH COUNTER-DOPED DOPANT DIFFUSION BARRIER Public/Granted day:2018-09-06
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