Invention Grant
- Patent Title: Transistors and methods of forming transistors
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Application No.: US15684081Application Date: 2017-08-23
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Publication No.: US10388864B2Publication Date: 2019-08-20
- Inventor: Kamal M. Karda , Gurtej S. Sandhu , Chandra Mouli
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L45/00 ; H01L29/78 ; H01L29/267 ; H01L21/02 ; H01L27/115 ; H01L29/12 ; H01L29/786 ; H01L23/535 ; H01L27/22 ; H01L27/24 ; H01L43/02 ; H01L43/10
Abstract:
Some embodiments include a transistor having a drain region and a source region. A conductive gate is between the source and drain regions. First channel material is between the gate and the source region. The first channel material is spaced from the gate by one or more insulative materials. Second channel material is between the first channel material and the source region, and directly contacts the source region. The first and second channel materials are transition metal chalcogenide. One of the source and drain regions is a hole reservoir region and the other is an electron reservoir region. Tunnel dielectric material may be between the first and second channel materials.
Public/Granted literature
- US20170373247A1 Transistors and Methods of Forming Transistors Public/Granted day:2017-12-28
Information query
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