A method of manufacturing an integrated circuit device includes providing a substrate comprising a semiconductor active layer, and forming source/drain regions, temperature sensors, and heating elements either in the semiconductor active layer or on the front side of the semiconductor active layer. The semiconductor active layer has channel regions between adjacent source/drain regions, and each of the heating elements is aligned over at least a portion of a corresponding temperature sensor. The method also includes forming a metal interconnect structure over the front side of the semiconductor active layer and exposing the channel regions from the back side of the semiconductor active layer substrate. A fluid gate dielectric layer is formed over the exposed channel regions.