Invention Grant
- Patent Title: Temporarily favoring selection of store requests from one of multiple store queues for issuance to a bank of a banked cache
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Application No.: US15825418Application Date: 2017-11-29
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Publication No.: US10394567B2Publication Date: 2019-08-27
- Inventor: Sanjeev Ghai , Guy L. Guthrie , Hugh Shen , Derek E. Williams
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Brian F. Russell; Bryan Bortnick
- Main IPC: G11C11/406
- IPC: G11C11/406 ; G06F9/38 ; G06F9/54 ; G06F9/30 ; G06F12/08

Abstract:
A data processing system includes a plurality of processor cores each having a respective store-through upper level cache and a store-in banked lower level cache. Store requests of the plurality of processor cores destined for the banked lower level cache are buffered in multiple store queues including a first store queue and a second store queue. In response to determining that the multiple store queues contain store requests targeting a common bank of the banked lower level cache, store requests from the first store queue are temporarily favored for selection for issuance to the banked lower level cache over those in the second store queue.
Public/Granted literature
- US20180350427A1 PROMOTING UTILIZATION OF STORE BANDWIDTH OF A BANKED CACHE Public/Granted day:2018-12-06
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