Invention Grant
- Patent Title: Gate networks having positive temperature coefficients of resistance (PTC) for semiconductor power conversion devices
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Application No.: US15643146Application Date: 2017-07-06
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Publication No.: US10403623B2Publication Date: 2019-09-03
- Inventor: Peter Almern Losee , Alexander Viktorovich Bolotnikov , Fabio Carastro , Alvaro Jorge Mari Curbelo
- Applicant: General Electric Company
- Applicant Address: US NY Schenectady
- Assignee: GENERAL ELECTRIC COMPANY
- Current Assignee: GENERAL ELECTRIC COMPANY
- Current Assignee Address: US NY Schenectady
- Agency: Fletcher Yoder, P.C.
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L23/522 ; H01L23/528 ; H01L29/423 ; H01L29/16 ; H01L21/8234 ; H01L29/78 ; H01L27/07

Abstract:
A gate network of a silicon-carbide (SiC) power conversion device includes a plurality of gate electrodes of SiC metal-oxide-semiconductor-based (MOS-based) transistor device cells disposed in an active area of the SiC power conversion device, and a gate pad disposed in a gate pad and bus area of the SiC power conversion device. The gate network also includes a gate bus disposed in the gate pad and bus area of the SiC power conversion device, wherein the gate bus extends between and electrically connects the gate pad to at least a portion of the plurality of gate electrodes in the active area of the SiC power conversion device. At least a portion of the gate pad, the gate bus, the plurality of gate electrodes, or a combination thereof, of the gate network have a positive temperature coefficient of resistance greater than approximately 2000 parts-per-million per degree Celsius (ppm/° C.).
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