Invention Grant
- Patent Title: Semiconductor device with reduced gate height budget
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Application No.: US15656542Application Date: 2017-07-21
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Publication No.: US10403734B2Publication Date: 2019-09-03
- Inventor: Hui Zang , Haigou Huang
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Roberts Mlotkowski Safran Cole & Calderon, P.C.
- Agent Francois Pagette; Andrew M. Calderon
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L29/78 ; H01L29/66 ; H01L29/49 ; H01L21/762

Abstract:
The present disclosure relates to semiconductor structures and, more particularly, to semiconductor device with reduced gate height budget and methods of manufacture. The method includes: forming a plurality of gate structures on a substrate; recessing material of the plurality of gate structures to below a surface of an insulator material; forming trenches in the insulator material and underlying material adjacent to sidewalls of the plurality of gate structures; and filling the recesses and trenches with a capping material.
Public/Granted literature
- US20190027575A1 SEMICONDUCTOR DEVICE WITH REDUCED GATE HEIGHT BUDGET Public/Granted day:2019-01-24
Information query
IPC分类: