Invention Grant
- Patent Title: Reference voltage prediction in memory subsystem
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Application No.: US15848804Application Date: 2017-12-20
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Publication No.: US10408863B2Publication Date: 2019-09-10
- Inventor: Robert E. Jeter , Fabien S. Faure , Rakesh L. Notani
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Erik A. Heter
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G01R19/165 ; G11C5/14 ; G11C8/12 ; G11C5/02

Abstract:
A method and apparatus for predicting a reference voltage in a memory subsystem is disclosed. A memory subsystem includes a memory controller coupled to a memory. The memory controller includes a lookup table having a number of different reference voltage values each corresponding to one of a number of different performance states. The memory controller further includes calibration circuitry configured to determine reference voltages for operation in various performance states. Responsive to returning to a performance state after operating in another, the calibration circuitry may restore the reference voltage to its most recently used value, and also obtain a predicted reference voltage. Calibrations may be performed at both the restored reference voltage and the predicted reference voltage obtained from the lookup table. The subsequent operating reference voltage may then be selected based on which of the two calibrations resulted in the largest data eye width.
Public/Granted literature
- US20190187189A1 Reference Voltage Prediction in Memory Subsystem Public/Granted day:2019-06-20
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