- Patent Title: Single interconnect index pointer for stacked die address encoding
-
Application No.: US15705867Application Date: 2017-09-15
-
Publication No.: US10410994B2Publication Date: 2019-09-10
- Inventor: Kevin Gustav Werhane , Jason M. Johnson
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L25/065
- IPC: H01L25/065 ; G01R31/28 ; G01R31/3177 ; H03K19/20

Abstract:
Techniques for using a single thru-chip signal path to auto-identify and address each integrated circuit within a stack of integrated circuits upon power-up of stack. In an example, each integrated circuit of the stack can include a single auto-identify input terminal, a single auto-identify output terminal, and control logic configured to receive a logic state on the single auto-identify input terminal, to set an internal indicator to one of three states, and to control a state of the single auto-identify output terminal in response to a power up condition or to a change in the logic state of the single auto-identify input terminal.
Public/Granted literature
- US20190086469A1 SINGLE INTERCONNECT INDEX POINTER FOR STACKED DIE ADDRESS ENCODING Public/Granted day:2019-03-21
Information query
IPC分类: