Invention Grant
- Patent Title: Amplifier bias technique
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Application No.: US15909840Application Date: 2018-03-01
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Publication No.: US10411652B2Publication Date: 2019-09-10
- Inventor: Yu-Ching Yeh , Sean Joel Lyn , Cheng-Han Wang , Roger Brockenbrough
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Qualcomm Incorporated/Seyfarth Shaw LLP
- Agent Alan M. Lenkin
- Main IPC: H03F3/45
- IPC: H03F3/45 ; H03F1/02 ; H03F3/24 ; H03F3/195 ; H03F3/193

Abstract:
An amplifier may include a first transistor. The amplifier may also include a second transistor coupled to the first transistor in an output stage of the amplifier. The amplifier may also include a level shift resistor coupled between a gate of the first transistor and a gate of the second transistor. The amplifier may further include a feedback bias circuit coupled to the gate of the first transistor and the gate of the second transistor through the level shift resistor. The feedback bias circuit may be configured to sense a common mode voltage of the output stage of the amplifier, and to compare the common mode voltage with a reference voltage to control a resistor bias current conducted by the level shift resistor.
Public/Granted literature
- US20190028061A1 AMPLIFIER BIAS TECHNIQUE Public/Granted day:2019-01-24
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