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    Area-efficient balun
    1.
    发明授权
    Area-efficient balun 有权

    公开(公告)号：US11600916B2

    公开(公告)日：2023-03-07

    申请号：US17164494

    申请日：2021-02-01

    Applicant: QUALCOMM Incorporated

    Inventor： Sean Joel Lyn ,  Cheng-Han Wang ,  Hye Jin Song ,  Hai Huang ,  Sang-Oh Lee

    IPC: H01Q7/00 ,  H01P5/10 ,  H01Q1/50

    Abstract: An area-efficient balun and a method for signal processing using such a balun. One example balun generally includes a winding and a clamping circuit. The winding is formed by a coiled trace including a first portion having a first trace width and a second portion having a second trace width, the second trace width being narrower than the first trace width. The clamping circuit has a first terminal and a second terminal, the first terminal of the clamping circuit being coupled to the first portion of the coiled trace.

    High selectivity TDD RF front end
    2.
    发明授权
    High selectivity TDD RF front end 有权

    公开(公告)号：US10574286B2

    公开(公告)日：2020-02-25

    申请号：US16118222

    申请日：2018-08-30

    Applicant: QUALCOMM Incorporated

    Inventor： Cheng-Han Wang ,  Young Gon Kim ,  Kamal Aggarwal

    IPC: H04B1/48 ,  H03F3/189 ,  H03H7/38 ,  H04B1/3805 ,  H04L5/14

    Abstract: An RF front end provides high receive selectivity by selectively configuring matching networks within a Time Division Duplex transceiver. One or more elements of the transmit or receive signal paths are configured to perform multiple functions. Each of the functions can be performed in dependence on an operating mode of the RF front end. In some embodiments, one or more elements in the transmit or receive signal paths are reconfigured during receive portions of operation to provide additional receive selectivity.

    Amplifier bias technique
    3.
    发明授权
    Amplifier bias technique 有权

    公开(公告)号：US10411652B2

    公开(公告)日：2019-09-10

    申请号：US15909840

    申请日：2018-03-01

    Applicant: QUALCOMM Incorporated

    Inventor： Yu-Ching Yeh ,  Sean Joel Lyn ,  Cheng-Han Wang ,  Roger Brockenbrough

    IPC: H03F3/45 ,  H03F1/02 ,  H03F3/24 ,  H03F3/195 ,  H03F3/193

    Abstract: An amplifier may include a first transistor. The amplifier may also include a second transistor coupled to the first transistor in an output stage of the amplifier. The amplifier may also include a level shift resistor coupled between a gate of the first transistor and a gate of the second transistor. The amplifier may further include a feedback bias circuit coupled to the gate of the first transistor and the gate of the second transistor through the level shift resistor. The feedback bias circuit may be configured to sense a common mode voltage of the output stage of the amplifier, and to compare the common mode voltage with a reference voltage to control a resistor bias current conducted by the level shift resistor.

    Temperature dependent amplifier biasing
    5.
    发明授权
    Temperature dependent amplifier biasing 有权
    温度依赖放大器偏置

    公开(公告)号：US09401680B2

    公开(公告)日：2016-07-26

    申请号：US14158318

    申请日：2014-01-17

    Applicant: QUALCOMM Incorporated

    Inventor： Jungdong Park ,  Cheng-Han Wang ,  Hong Sun Kim ,  Mohammad Bagher Vahid Far

    IPC: H03F3/04 ,  H03F1/30 ,  H03F3/193 ,  H03F3/195 ,  H03F3/24

    CPC classification number: H03F1/301 ,  H03F1/30 ,  H03F3/193 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/18 ,  H03F2200/294 ,  H03F2200/411 ,  H03F2200/447 ,  H03F2200/451

    Abstract: An apparatus includes a first bias circuit configured to generate a first current that varies with temperature according to a first slope. The apparatus also includes a second bias circuit configured to generate a second current that varies with temperature according to a second slope. The apparatus further includes a low noise amplifier including a transconductance stage that is responsive to an output of the first bias circuit. The apparatus also includes a load coupled to an output of the low noise amplifier and responsive to an output of the second bias circuit.

    Abstract translation: 一种装置包括：第一偏置电路，被配置为产生根据第一斜率随温度变化的第一电流。 该装置还包括第二偏置电路，其被配置为产生根据第二斜率随温度变化的第二电流。 该装置还包括低噪声放大器，其包括响应于第一偏置电路的输出的跨导级。 该装置还包括负载耦合到低噪声放大器的输出并响应于第二偏置电路的输出。

    Ultra wideband transmitter
    6.
    发明授权
    Ultra wideband transmitter 有权

    公开(公告)号：US11967983B2

    公开(公告)日：2024-04-23

    申请号：US17934513

    申请日：2022-09-22

    Applicant: QUALCOMM Incorporated

    Inventor： Yi Zeng ,  Cheng-Han Wang ,  Emanuele Lopelli ,  Chan Hong Park ,  Liang Zhao ,  Le Nguyen Luong ,  Koorosh Akhavan

    IPC: H04B1/717 ,  H03F3/24

    CPC classification number: H04B1/7174 ,  H03F3/245 ,  H03F2200/09 ,  H03F2200/451

    Abstract: Aspects described herein include devices and methods for smart ultra wideband transmissions. In one aspect, an apparatus includes pulse generation circuitry configured to output a plurality of transmission (TX) pulse samples at a selected signal sample rate, where each pulse sample of the plurality of TX pulse samples comprises a value associated with a pulse amplitude at a corresponding sample time The apparatus includes a plurality of power amplifier (PA) cells, with each PA cell of the plurality of PA cells comprising a corresponding current source and associated gates, and where the associated gates of a PA cell are selectable to configure an on state and an off state. Logic circuitry of the apparatus is configured to set the on state or the off state for each PA cell.

    Quadrature voltage-controlled oscillator (QVCO) with improved phase noise and quadrature imbalance trade-off
    7.
    发明授权
    Quadrature voltage-controlled oscillator (QVCO) with improved phase noise and quadrature imbalance trade-off 有权

    公开(公告)号：US11695372B1

    公开(公告)日：2023-07-04

    申请号：US17650834

    申请日：2022-02-11

    Applicant: QUALCOMM Incorporated

    Inventor： Emanuele Lopelli ,  Cheng-Han Wang ,  Yi Zeng

    IPC: H03B5/12

    CPC classification number: H03B5/1228 ,  H03B5/124 ,  H03B5/1212 ,  H03B2200/009 ,  H03B2200/0078

    Abstract: Apparatus and methods for generating multiple oscillating signals. An example circuit generally includes a first voltage-controlled oscillator (VCO) circuit and a second VCO circuit having a differential bias input coupled to a differential output of the first VCO circuit. At least one of the first VCO circuit or the second VCO circuit generally includes: a pair of cross-coupled transistors comprising a first transistor and a second transistor, a first inductive element coupled between a first node and the drain of the first transistor, a second inductive element coupled between the first node and the drain of the second transistor, a third transistor having a drain coupled to the drain of the first transistor and having a source coupled to a second node, and a fourth transistor having a drain coupled to the drain of the second transistor and having a source coupled to the second node.

    Clock synchronization
    8.
    发明授权
    Clock synchronization 有权

    公开(公告)号：US10250375B2

    公开(公告)日：2019-04-02

    申请号：US15273015

    申请日：2016-09-22

    Applicant: QUALCOMM Incorporated

    Inventor： Justin Black ,  Cheng-Han Wang ,  Jeongsik Yang

    IPC: H04L7/00 ,  H03K19/21 ,  H03L7/00 ,  H03L7/081 ,  H03L7/14 ,  H03L7/22 ,  H04W52/02

    Abstract: An apparatus and a method are disclosed for synchronizing clock signals distributed within a wireless device. In some embodiments, a local oscillator (LO) clock signal is buffered and distributed to two or more transceivers within the wireless device. Each transceiver may include a configurable clock divider to divide the distributed LO clock signal and generate an output clock signal. A phase detector compares output clock signals from each of the configurable clock dividers and generates an output signal in accordance with a determined phase difference. The phase detector output signal may cause at least one of the configurable clock dividers to modify its respective output clock signal, and thereby synchronize output clock signals between different configurable clock dividers. In some embodiments, a clock signal from a configurable clock divider may be modified (shifted) by approximately 90 or 180 degrees.

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