Invention Grant
- Patent Title: Efficiently training memory device chip select control
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Application No.: US15721516Application Date: 2017-09-29
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Publication No.: US10416912B2Publication Date: 2019-09-17
- Inventor: Tonia G. Morris , Christopher P. Mozak , Christopher E. Cox
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G11C11/4076 ; G11C8/12 ; G11C29/00 ; G11C29/02

Abstract:
A chip select training mode (CSTM) enables a memory subsystem to train a chip select signal separately from command bus training. A memory device and a memory controller can connect via a command bus including a chip select signal line. Instead of training the chip select along with other signal lines of the command bus, a CSTM mode enables the memory subsystem to more accurately train the chip select. The memory device can be triggered for CSTM mode with a command, and then train voltage margining for the CS signal line to align chip select signaling with the memory subsystem clock signal.
Public/Granted literature
- US20180121123A1 EFFICIENTLY TRAINING MEMORY DEVICE CHIP SELECT CONTROL Public/Granted day:2018-05-03
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