Invention Grant
- Patent Title: Minimizing two-step and hard state transitions in multi-level STT-MRAM devices
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Application No.: US15724075Application Date: 2017-10-03
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Publication No.: US10418082B2Publication Date: 2019-09-17
- Inventor: Imtiaz Ahmad , Mahmoud Imdoukh , Mohammad G H. Alfailakawi
- Applicant: KUWAIT UNIVERSITY
- Applicant Address: KW Safat
- Assignee: Kuwait University
- Current Assignee: Kuwait University
- Current Assignee Address: KW Safat
- Agent Richard C. Litman
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/16 ; G11C11/56 ; G11C7/10

Abstract:
Data is stored in a multi-level MRAM (MLC MRAM) cell in a manner that reduces transition states that require high energy. A new data block is received, and the new data block is divided into one or more sub-groups of bits, with each sub-group comprising at least two bits. Each sub-group is assigned data bit locations in a memory store. The received bits are compared with sub-groups present at the data bit locations to determine subgroups of hot bits. For each subgroup of hot bits, an encoding flag value is determined by XORing their most significant bits. The most significant bits of each subgroup of hot bits are complemented and the encoding flag is SET. A data block is generated to establish a data group for each subgroup of hot bits including the subgroup of hot bits and the encoding flag for that subgroup.
Public/Granted literature
- US20190103150A1 MINIMIZING TWO-STEP AND HARD STATE TRANSITIONS IN MULTI-LEVEL STT_MRAM DEVICES Public/Granted day:2019-04-04
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