Invention Grant
- Patent Title: Network video clock decoupling
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Application No.: US15940151Application Date: 2018-03-29
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Publication No.: US10419766B2Publication Date: 2019-09-17
- Inventor: Mark LaBosco , Agesino Primatic , Michael Bottiglieri
- Applicant: Crestron Electronics, Inc.
- Applicant Address: US NJ Rockleigh
- Assignee: Crestron Electronics, Inc.
- Current Assignee: Crestron Electronics, Inc.
- Current Assignee Address: US NJ Rockleigh
- Agency: Crestron Electronics, Inc.
- Main IPC: H04N19/172
- IPC: H04N19/172 ; H04N19/86 ; H03L7/06 ; H04N19/146 ; H04N21/24 ; H04L29/06 ; H04N21/242 ; H04N21/43

Abstract:
Presented are a system and method for distributing video over a network. The system includes a source that outputs video with a first frame rate, a transmitter, a receiver, and a sink. The transmitter receives video from the source and processes the video by encoding the video with frame boundary information, packetizing, and transmitting the video. The receiver includes a frame buffer, a timing generator, and a PLL. The receiver receives and processes the video by retrieving the frame boundary information, decoding the video into sub-frames, and writing the sub-frames to the buffer. All the processing occurs on sub-frame portions of the video in sub-frame time intervals. The receiver transmits video with a second frame rate to the sink. The timing generator generates output timing and uses the PLL to synchronize the output timing with the frame boundary information and synchronizes the first and second frame rates.
Public/Granted literature
- US20180288424A1 NETWORK VIDEO CLOCK DECOUPLING Public/Granted day:2018-10-04
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