Integrated circuit devices including vertical Hall elements and lateral Hall elements and methods for fabricating integrated circuits are provided. In an exemplary embodiment, an integrated circuit device includes a substrate including a lateral element region and a vertical element region. The integrated circuit device includes a well in the lateral element region and in the vertical element region of the substrate. Further, the integrated circuit device includes an insulating layer disposed over the substrate in the lateral element region, a semiconductor-over-insulator (SOI) semiconductor layer disposed over the insulating layer in the lateral element region, and lateral element conductive taps located in the semiconductor layer, wherein a lateral Hall element is defined in the lateral element region. Also, the integrated circuit device includes vertical element taps located in the well in the vertical element region, wherein a vertical Hall element is defined in the vertical element region.