Invention Grant
- Patent Title: Scan flip-flop and scan test circuit including the same
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Application No.: US15663852Application Date: 2017-07-31
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Publication No.: US10429443B2Publication Date: 2019-10-01
- Inventor: Ha-Young Kim , Sung-Wee Cho , Dal-Hee Lee , Jae-Ha Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine, Whitt & Francos, PLLC
- Priority: KR10-2015-0049953 20150408; KR10-2015-0118271 20150821
- Main IPC: G01R31/3185
- IPC: G01R31/3185 ; H03K3/3562

Abstract:
A scan flip-flop includes an input unit and a flip-flop. The input unit is configured to select one signal from among a data input signal and a scan input signal to supply the selected one signal as an internal signal according to an operation mode. The flip-flop is configured to latch the internal signal according to a clock signal. The flip-flop includes a cross coupled structure that includes first and second tri-state inverters which share a first output node and face each other.
Public/Granted literature
- US20170328954A1 SCAN FLIP-FLOP AND SCAN TEST CIRCUIT INCLUDING THE SAME Public/Granted day:2017-11-16
Information query
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