Invention Grant
- Patent Title: Method, system, and apparatus for page sizing extension
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Application No.: US15384067Application Date: 2016-12-19
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Publication No.: US10445245B2Publication Date: 2019-10-15
- Inventor: Edward Grochowski , Julio Gago , Roger Gramunt , Roger Espasa , Rolf Kassa
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06F12/1009
- IPC: G06F12/1009 ; G06F12/1027 ; G06F12/14 ; G06F12/0864

Abstract:
A method, system, and apparatus may initialize a fixed plurality of page table entries for a fixed plurality of pages in memory, each page having a first size, wherein a linear address for each page table entry corresponds to a physical address and the fixed plurality of pages are aligned. A bit in each of the page table entries for the aligned pages may be set to indicate whether or not the fixed plurality of pages is to be treated as one combined page having a second page size larger than the first page size. Other embodiments are described and claimed.
Public/Granted literature
- US20170192904A1 METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION Public/Granted day:2017-07-06
Information query
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