Invention Grant
- Patent Title: Semiconductor device and method of manufacturing semiconductor device
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Application No.: US15796816Application Date: 2017-10-29
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Publication No.: US10446543B2Publication Date: 2019-10-15
- Inventor: Shinichi Uchida , Takafumi Kuramoto , Yasutaka Nakashiba
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2016-251302 20161226
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L27/06 ; H01L29/94 ; H01L21/84 ; H01L23/522 ; H01L23/528 ; H01L27/12 ; H01L29/66 ; H01L29/93 ; H01L23/485

Abstract:
A semiconductor device of the present invention includes, in a region 1C, a top electrode made by a semiconductor layer of an SOI substrate, a capacitive insulating film made by an insulating layer, a bottom electrode made by a supporting board, and a lead part (a high-concentration impurity region of an n type) of the bottom electrode coupled to the supporting board. An SOI transistor in a region 1B is formed over a main surface of the semiconductor layer over the insulating layer as a thin film, and threshold voltage can be adjusted by applying a voltage to a well arranged on the rear face side of the insulating layer.
Public/Granted literature
- US20180182751A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2018-06-28
Information query
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