Invention Grant
- Patent Title: Methods of forming replacement gate structures on transistor devices
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Application No.: US15797837Application Date: 2017-10-30
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Publication No.: US10453936B2Publication Date: 2019-10-22
- Inventor: Jiehui Shu , Chang Seo Park , Shimpei Yamaguchi , Tao Han , Yong Mo Yang , Jinping Liu , Hyuck Soo Yang
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8234 ; H01L27/088

Abstract:
One illustrative method disclosed herein includes, among other things, forming a sacrificial gate structure above a semiconductor substrate, the sacrificial gate structure comprising a sacrificial gate insulation layer and a sacrificial gate electrode material, performing a first gate-cut etching process to thereby form an opening in the sacrificial gate electrode material and forming an internal sidewall spacer in the opening. In this example, the method also includes, after forming the internal sidewall spacer, performing a second gate-cut etching process through the opening, the second gate-cut etching process being adapted to remove the sacrificial gate electrode material, performing an oxidizing anneal process and forming an insulating material in at least the opening.
Public/Granted literature
- US20190131429A1 METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON TRANSISTOR DEVICES Public/Granted day:2019-05-02
Information query
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