Invention Grant
- Patent Title: Package structure and manufacturing method thereof
-
Application No.: US15696192Application Date: 2017-09-06
-
Publication No.: US10461034B2Publication Date: 2019-10-29
- Inventor: Kai-Chiang Wu , Chen-Hua Yu , Kuo-Chung Yee
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/36 ; H01L21/48 ; H01L21/56 ; H01L23/66 ; H01L23/367 ; H01L23/31 ; H01L23/00 ; H01Q1/22 ; H01L21/683 ; H01L23/498 ; H01Q1/24

Abstract:
A package structure and the method thereof are provided. At least one die is molded in a molding compound. A ground plate is located on a backside surface of the die, a first surface of the ground plate is exposed from the molding compound and a second surface of the ground plate is covered by the molding compound. The first surface of the ground plate is levelled and coplanar with a third surface of the molding compound. A connecting film is located between the backside surface of the die and the second surface of the ground plate. The die, the molding compound and the ground plate are in contact with the connecting film. Through interlayer vias (TIVs) are molded in the molding compound, and at least one of the TIVs is located on and physically contacts the second surface of the ground plate.
Public/Granted literature
- US20190035737A1 PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2019-01-31
Information query
IPC分类: