Invention Grant
- Patent Title: Stretchable electronics fabrication method with strain redistribution layer
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Application No.: US15546958Application Date: 2015-03-11
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Publication No.: US10468357B2Publication Date: 2019-11-05
- Inventor: Rajendra C. Dias , Tatyana N. Andryushchenko , Mauro J. Kobrinsky , Aleksandar Aleksov , David W. Staines
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe,Williamson & Wyatt, P.C.
- International Application: PCT/US2015/019981 WO 20150311
- International Announcement: WO2016/144356 WO 20160915
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00 ; H01L23/16 ; H01L21/48 ; H01L21/56 ; H01L23/31

Abstract:
Embodiments of the invention include a microelectronic device and methods for forming a microelectronic device. In an embodiment, the microelectronic device includes a semiconductor die that has one or more die contacts that are each electrically coupled to a contact pad by a conductive trace. The semiconductor die may have a first elastic modulus. The microelectronic device may also include an encapsulation layer over the semiconductor die and the conductive trace. The encapsulation layer may have a second elastic modulus that is less than the first elastic modulus. The microelectronic device may also include a first strain redistribution layer within the encapsulation layer. The first strain redistribution layer may have a footprint that covers the semiconductor die and a portion of the conductive traces. The strain redistribution layer may have a third elastic modulus that is less than the first elastic modulus and greater than the second elastic modulus.
Public/Granted literature
- US20180019213A1 STRETCHABLE ELECTRONICS FABRICATION METHOD WITH STRAIN REDISTRIBUTION LAYER Public/Granted day:2018-01-18
Information query
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