Invention Grant
- Patent Title: Indicating instruction scheduling mode for processing wavefront portions
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Application No.: US15439540Application Date: 2017-02-22
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Publication No.: US10474468B2Publication Date: 2019-11-12
- Inventor: Michael J. Mantor , Brian D. Emberling , Mark Fowler , Mark M. Leather
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Meyertons Hood Kivlin Kowert and Goetzel PC
- Agent Rory D. Rankin
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06T1/20 ; G06F9/30

Abstract:
Systems, apparatuses, and methods for processing variable wavefront sizes on a processor are disclosed. In one embodiment, a processor includes at least a scheduler, cache, and multiple execution units. When operating in a first mode, the processor executes the same instruction on multiple portions of a wavefront before proceeding to the next instruction of the shader program. When operating in a second mode, the processor executes a set of instructions on a first portion of a wavefront. In the second mode, when the processor finishes executing the set of instructions on the first portion of the wavefront, the processor executes the set of instructions on a second portion of the wavefront, and so on until all portions of the wavefront have been processed. The processor determines the operating mode based on one or more conditions.
Public/Granted literature
- US20180239606A1 VARIABLE WAVEFRONT SIZE Public/Granted day:2018-08-23
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