Invention Grant
- Patent Title: Error checking and correcting decoding method and apparatus
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Application No.: US15808808Application Date: 2017-11-09
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Publication No.: US10474529B2Publication Date: 2019-11-12
- Inventor: Ching-Yu Chen , Yi-Lin Lai , Chen-Te Chen
- Applicant: VIA Technologies, Inc.
- Applicant Address: TW New Taipei
- Assignee: VIA Technologies, Inc.
- Current Assignee: VIA Technologies, Inc.
- Current Assignee Address: TW New Taipei
- Agency: JCIPRNET
- Priority: TW106130144A 20170904
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/10 ; H03M13/11 ; G11C29/52

Abstract:
An error checking and correcting (ECC) decoding method and apparatus are provided. A decoding circuit decodes a codeword using (or without using) reference information, wherein when the decoding circuit fails to decode a first codeword, the decoding circuit decodes a second codeword to produce decoded data. The decoding circuit checks whether a change has occurred from each codeword bit of the second codeword to a corresponding bit of the decoded data. In accordance with a bit position of the changed corresponding bit, the decoding circuit correspondingly changes the first codeword to a modified codeword, and/or correspondingly changes the reference information to modified information. The decoding circuit performs the ECC decoding again on the modified codeword (or the first codeword) using (or without using) the modified information.
Public/Granted literature
- US20190073262A1 ERROR CHECKING AND CORRECTING DECODING METHOD AND APPARATUS Public/Granted day:2019-03-07
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