Invention Grant
- Patent Title: Integrated passive devices on chip
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Application No.: US16060658Application Date: 2015-12-26
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Publication No.: US10483249B2Publication Date: 2019-11-19
- Inventor: Donald S. Gardner , Edward A. Burton , Gerhard Schrom , Larry E. Mosley
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- International Application: PCT/US2015/000458 WO 20151226
- International Announcement: WO2017/111861 WO 20170629
- Main IPC: H01L25/16
- IPC: H01L25/16 ; H01L25/07 ; H01L23/498 ; H01L23/00 ; H01L49/02 ; H01L21/50 ; H01L29/20

Abstract:
Embodiments are generally directed to integrated passive devices on chip. An embodiment of a device includes a semiconductor die; a semiconductor die package, a first side of the package being coupled with the semiconductor die; and one or more separate dies to provide passive components for operation of the semiconductor die, wherein the passive components for operation of the semiconductor die includes inductors.
Public/Granted literature
- US20190006334A1 INTEGRATED PASSIVE DEVICES ON CHIP Public/Granted day:2019-01-03
Information query
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